Highly integrated direct conversion receiver for GSM/GPRS/EDGE with on-chip 84-dB dynamic range continuous-time ΣΔ ADC

• This paper describes a highly digitized direct conversion receiver of a single-chip quadruple-band RF transceiver that meets GSM/GPRS and EDGE requirements. The chip uses an advanced 0.25-mum BiCMOS technology. The I and Q on-chip fifth-order single-bit continuous-time sigma-delta (SigmaDelta) ADC has 84-dB dynamic range over a total bandwidth of +/-135 kHz for an active area of 0.4 mm(2). Hence, most of the channel filtering is realized in a CMOS IC where digital processing-is achieved at a lower cost. The systematic analysis of dc offset at each stage of the design enables to perform the dc offset cancellation loop in the digital domain as well. The receiver operates at 2.7 V with a current consumption of 75 mA. A first-order substrate coupling analysis enables to optimize the floor plan strategy. As a result, the receiver has an area of 1.8 mm(2).

Ämnesord

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik (hsv//swe)

ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Nyckelord

IIP2

GSM

GPRS

front-end

EDGE

direct conversion

dc offset

continuous time

analog-to-digital conversion

BiCMOS

low-noise

amplifier (LNA)

mixer

self-mixing

sigma-delta (Sigma Delta)

Publikations- och innehållstyp

art (ämneskategori)

ref (ämneskategori)