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A Low-Latency High-Throughput Soft-Output Signal Detector for Spatial Multiplexing MIMO Systems

Granlund, Stefan (author)
Liu, Liang (author)
Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH
Zhang, Chenxin (author)
Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH
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Öwall, Viktor (author)
Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH
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 (creator_code:org_t)
Elsevier BV, 2015
2015
English.
In: Microprocessors and Microsystems. - : Elsevier BV. - 0141-9331. ; 39:8, s. 901-908
  • Journal article (peer-reviewed)
Abstract Subject headings
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  • This paper presents a low latency, high throughput soft-output signal detector for a 4x4 64-QAM spatial-multiplexing MIMO system. To achieve high data-level parallelism and accurate soft information, the detector adopts a channel-adaptive node perturbation technique to generate a list of candidate vectors around an initial linear estimation. The detection algorithm provides a large range and convenient performance-complexity trade-off by adjusting the node perturbation parameter. A partial-parallel pipelined VLSI architecture is developed to implement the algorithm with high throughput, low processing latency, while offering the flexibility to support run-time performance tuning. Moreover, a fast and hardware-friendly node enumeration scheme is developed to further reduce the processing delay by exploiting the geometric property of the quadrature amplitude modulation (QAM) constellation. The detector was synthesized using Synopsys Design Compiler with a 65nm CMOS standard cell library. The core area is 0.58mm2 with 290K gates. The peak throughput is 3Gb/s at 500MHz clock frequency with a latency of 20ns. Compared to other reported soft-output MIMO detectors, this is a latency reduction of 71%. The corresponding energy consumption is 33pJ per bit detection.

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik (hsv//swe)
ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering (hsv//eng)

Keyword

MIMO
Detector
Soft-output
Low-latency

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art (subject category)
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Granlund, Stefan
Liu, Liang
Zhang, Chenxin
Öwall, Viktor
About the subject
ENGINEERING AND TECHNOLOGY
ENGINEERING AND ...
and Electrical Engin ...
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Microprocessors ...
By the university
Lund University

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