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Cross-Point Arrays with Low-Power ITO-HfO2 Resistive Memory Cells Integrated on Vertical III-V Nanowires
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- Persson, Karl-Magnus (author)
- Lund University,Lunds universitet,Nanoelektronik,Forskargrupper vid Lunds universitet,Nano Electronics,Lund University Research Groups
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- Mamidala, Saketh, Ram (author)
- Lund University,Lunds universitet,Nanoelektronik,Forskargrupper vid Lunds universitet,Nano Electronics,Lund University Research Groups
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- Kilpi, Olli-Pekka (author)
- Lund University,Lunds universitet,Nanoelektronik,Forskargrupper vid Lunds universitet,Nano Electronics,Lund University Research Groups
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- Borg, Mattias (author)
- Lund University,Lunds universitet,NanoLund: Centre for Nanoscience,Annan verksamhet, LTH,Lunds Tekniska Högskola,Nanoelektronik,Forskargrupper vid Lunds universitet,Other operations, LTH,Faculty of Engineering, LTH,Nano Electronics,Lund University Research Groups
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- Wernersson, Lars-Erik (author)
- Lund University,Lunds universitet,Nanoelektronik,Forskargrupper vid Lunds universitet,Nano Electronics,Lund University Research Groups
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(creator_code:org_t)
- 2020-05-11
- 2020
- English.
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In: Advanced Electronic Materials. - : Wiley. - 2199-160X. ; 6:6
- Related links:
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http://dx.doi.org/10... (free)
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Abstract
Subject headings
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- Vertical nanowires with cointegrated metal-oxide-semiconductor field-effect-transistor (MOSFET) selectors and nonvolatile resistive random access memory (RRAM) cells represent a promising candidate for fast, energy-efficient, cross-point memory cells. This paper explores indium-tin-oxide-hafnium-dioxide RRAM cells integrated onto arrays of indium-arsenide (InAs) vertical nanowires with a resulting area of 0.06 µm2 per cell. For low current operation, an improved switching uniformity over the intrinsic self-compliant behavior is demonstrated when using an external InAs nanowire MOSFET selector in series. The memory cells show consistent switching voltages below ±1 V and a switching cycle endurance of 106 is demonstrated. The developed fabrication scheme is fully compatible with low-ON-resistance vertical III-V nanowire MOSFET selectors, where operational compatibility with the initial high-field filament forming is established. Due to the small footprint of a vertical implementation, high density integration is achievable, and with a measured programming energy for 50 ns pulses at 0.49 pJ, the technology promises fast and ultralow power cross-point memory arrays.
Subject headings
- TEKNIK OCH TEKNOLOGIER -- Nanoteknik (hsv//swe)
- ENGINEERING AND TECHNOLOGY -- Nano-technology (hsv//eng)
Keyword
- RRAM
- ITO
- Nanowires
- Memory arrays
Publication and Content Type
- art (subject category)
- ref (subject category)
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