Another Trip to the Wall: How Much Will Stacked DRAM Benefit HPC?

• First defined two decades ago, the memory wall remains a fundamental limitation to system performance. Recent innovations in 3D-stacking technology enable DRAM devices with much higher bandwidths than traditional DIMMs. The first such products will soon hit the market, and some of the publicity claims that they will break through the memory wall. Here we summarize our analysis and expectations of how such 3D-stacked DRAMs will affect the memory wall for a set of representative HPC applications. We conclude that although 3D-stacked DRAM is a major technological innovation, it cannot eliminate the memory wall.

Ämnesord

NATURVETENSKAP  -- Data- och informationsvetenskap (hsv//swe)

NATURAL SCIENCES  -- Computer and Information Sciences (hsv//eng)

Nyckelord

Memory wall

Bandwidth

Dram

Latency

Hpc

Hybrid memory cube (hmc)

High bandwidth memory (hbm)

Publikations- och innehållstyp

kon (ämneskategori)

ref (ämneskategori)