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Compact low voltage four quadrant CMOS current multiplier
- Ravindran, A. (author)
- Ramarao, K. (author)
- Vidal, E. (author)
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- Ismail, Mohammed (author)
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- Institution of Engineering and Technology (IET), 2001
- 2001
- English.
- In: Electronics Letters. - : Institution of Engineering and Technology (IET). - 0013-5194 .- 1350-911X. ; 37:24, s. 1428-1429
- Journal article (peer-reviewed)
Abstract
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- A new compact low voltage four quadrant current mode CMOS multiplier is presented. Post layout simulation in a CMOS 0.5 mum technology shows a linearity error lower than 0.9% for signal swings up to +/- 50 muA. The Circuit operates at a supply of +/- 1.5V, has a static power dissipation of 0.6 mW and a 1 dB bandwidth of 33 MHz.
Keyword
- 4-quadrant
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- ref (subject category)
- art (subject category)
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- Ravindran, A.
- Ramarao, K.
- Vidal, E.
- Ismail, Mohammed
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- Royal Institute of Technology
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