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Sökning: id:"swepub:oai:DiVA.org:kth-4628" > Integration of sili...

LIBRIS Formathandbok  (Information om MARC21)
FältnamnIndikatorerMetadata
00004306nam a2200469 4500
001oai:DiVA.org:kth-4628
003SwePub
008080205s2008 | |||||||||||000 ||eng|
024a https://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-46282 URI
040 a (SwePub)kth
041 a engb eng
042 9 SwePub
072 7a vet2 swepub-contenttype
072 7a dok2 swepub-publicationtype
100a Zhang, Zhen,d 1979-u KTH,Integrerade komponenter och kretsar4 aut0 (Swepub:kth)u1rqshf6
2451 0a Integration of silicide nanowires as Schottky barrier source/drain in FinFETs
264 1a Stockholm :b KTH,c 2008
300 a xvi, 80 s.
338 a electronic2 rdacarrier
490a Trita-ICT/MAP AVH,x 1653-7610 ;v 2008:02
500 a QC 20100923
520 a The steady and aggressive downscaling of the physical dimensions of the conventional metal-oxide-semiconductor field-effect-transistor (MOSFET) has been the main driving force for the IC industry and information technology over the past decades. As the device dimensions approach the fundamental limits, novel double/trigate device architecture such as FinFET is needed to guarantee the ultimate downscaling. Furthermore, Schottky barrier source/drain technology presents a promising solution to reducing the parasitic source/drain resistance in the FinFET. The ultimate goal of this thesis is to integrate Schottky barrier source/drain in FinFETs, with an emphasis on process development and integration towards competitive devices. First, a robust sidewall transfer lithography (STL) technology is developed for mass fabrication of Si-nanowires in a controllable manner. A scalable self-aligned silicide (SALICIDE) process for Pt-silicides is also developed. Directly accessible and uniform NWs of Ni- and Pt-silicides are routinely fabricated by combining STL and SALICIDE. The silicide NWs are characterized by resistivity values comparable to those of their thin–film counterparts. Second, a systematic experimental study is performed for dopant segregation (DS) at the PtSi/Si and NiSi/Si interfaces in order to modulate the effective SBHs needed for competitive FinFETs. Two complementary schemes SIDS (silicidation induced dopant segregation) and SADS (silicide as diffusion source) are compared, and both yield substantial SBH modifications for both polarities of Schottky diodes (i.e. φbn and φbp). Third, Schottky barrier source/drain MOSFETs are fabricated in UTB-SOI. With PtSi that is usually used as the Schottky barrier source/drain for p-channel SB-MOSFETs, DS with appropriate dopants leads to excellent performance for both types of SBMOSFETs. However, a large variation in position of the PtSi/Si interface with reference to the gate edge (i.e., underlap) along the gate width is evidenced by TEM. Finally, integration of PtSi NWs in FinFETs is carried out by combining the STL technology, the Pt-SALICIDE process and the DS technology, all developed during the course of this thesis work. The performance of the p-channel FinFETs is improved by DS with B, confirming the SB-FinFET concept despite device performance fluctuations mostly likely due to the presence of the PtSi-to-gate underlap.
650 7a TEKNIK OCH TEKNOLOGIERx Elektroteknik och elektronikx Annan elektroteknik och elektronik0 (SwePub)202992 hsv//swe
650 7a ENGINEERING AND TECHNOLOGYx Electrical Engineering, Electronic Engineering, Information Engineeringx Other Electrical Engineering, Electronic Engineering, Information Engineering0 (SwePub)202992 hsv//eng
653 a CMOS technology
653 a MOSFET
653 a FinFET
653 a Schottky diode
653 a Schottky barrier soure/drain
653 a silicide
653 a SALICIDE
653 a SOI
653 a multiple-gate
653 a nanowire
653 a sidewall transfer lithography
653 a Electronics
653 a Elektronik
700a Zhang, Shi-Liu KTH,Integrerade komponenter och kretsar4 ths
700a King Liu, Tsu-Jae,c Professoru UC-Berkeley4 opn
710a KTHb Integrerade komponenter och kretsar4 org
856u https://kth.diva-portal.org/smash/get/diva2:13143/FULLTEXT01.pdfx primaryx Raw objecty fulltext
8564 8u https://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-4628

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