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Continuous-flow variable-length memoryless linear regression architecture

Garrido Gálvez, Mario (author)
Linköpings universitet,Elektroniksystem,Tekniska högskolan
Grajal, J. (author)
University of Politecn Madrid, Spain
 (creator_code:org_t)
2013-11
2013
English.
In: Electronics Letters. - : Institution of Engineering and Technology (IET). - 0013-5194 .- 1350-911X. ; 49:24, s. 1567-1568
  • Journal article (peer-reviewed)
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  • A pipelined circuit to calculate linear regression is presented. The proposed circuit has the advantages that it can process a continuous flow of data, it does not need memory to store the input samples and supports variable length that can be reconfigured in run time. The circuit is efficient in area, as it consists of a small number of adders, multipliers and dividers. These features make it very suitable for real-time applications, as well as for calculating the linear regression of a large number of samples.

Keyword

adders; dividing circuits; logic design; multiplying circuits; regression analysis; dividers; multipliers; adders; pipelined circuit; continuous-flow variable-length memoryless linear regression architecture
TECHNOLOGY
TEKNIKVETENSKAP

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