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Power-performance tradeoffs in data center servers : DVFS, CPUpinning, horizontal, and vertical scaling

Krzywda, Jakub, 1989- (author)
Umeå universitet,Institutionen för datavetenskap,Distributed Systems,Umea Univ, Dept Comp Sci, SE-90187 Umea, Sweden.
Ali-Eldin, Ahmed (author)
Umeå universitet,Institutionen för datavetenskap,Distributed Systems,Umea Univ, Dept Comp Sci, SE-90187 Umea, Sweden.
Carlson, Trevor E. (author)
Uppsala universitet,Datorteknik,Natl Univ Singapore, Sch Comp, 13 Comp Dr, Singapore 117417, Singapore,Umea Univ, Dept Comp Sci, SE-90187 Umea, Sweden.
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Östberg, Per-Olov (author)
Umeå universitet,Institutionen för datavetenskap,Distributed Systems,Umea Univ, Dept Comp Sci, SE-90187 Umea, Sweden.
Elmroth, Erik (author)
Umeå universitet,Institutionen för datavetenskap,Distributed Systems
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 (creator_code:org_t)
Elsevier BV, 2018
2018
English.
In: Future generations computer systems. - : Elsevier BV. - 0167-739X .- 1872-7115. ; 81, s. 114-128
  • Journal article (peer-reviewed)
Abstract Subject headings
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  • Dynamic Voltage and Frequency Scaling (DVFS), CPU pinning, horizontal, and vertical scaling, are four techniques that have been proposed as actuators to control the performance and energy consumption on data center servers. This work investigates the utility of these four actuators, and quantifies the power-performance tradeoffs associated with them. Using replicas of the German Wikipedia running on our local testbed, we perform a set of experiments to quantify the influence of DVFS, vertical and horizontal scaling, and CPU pinning on end-to-end response time (average and tail), throughput, and power consumption with different workloads. Results of the experiments show that DVFS rarely reduces the power consumption of underloaded servers by more than 5%, but it can be used to limit the maximal power consumption of a saturated server by up to 20% (at a cost of performance degradation). CPU pinning reduces the power consumption of underloaded server (by up to 7%) at the cost of performance degradation, which can be limited by choosing an appropriate CPU pinning scheme. Horizontal and vertical scaling improves both the average and tail response time, but the improvement is not proportional to the amount of resources added. The load balancing strategy has a big impact on the tail response time of horizontally scaled applications.

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Elektroteknik och elektronik -- Datorsystem (hsv//swe)
ENGINEERING AND TECHNOLOGY  -- Electrical Engineering, Electronic Engineering, Information Engineering -- Computer Systems (hsv//eng)
NATURVETENSKAP  -- Data- och informationsvetenskap -- Datorteknik (hsv//swe)
NATURAL SCIENCES  -- Computer and Information Sciences -- Computer Engineering (hsv//eng)

Keyword

Power-performance tradeoffs
Dynamic Voltage and Frequency Scaling (DVFS)
CPU pinning
Horizontal scaling
Vertical scaling
datalogi
Computer Science

Publication and Content Type

ref (subject category)
art (subject category)

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