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Subthreshold behavior of triple-gate MOSFETs on SOI material

Lemme, Max C., 1970- (author)
AMO GmbH, AMICA, Aachen, Germany
Mollenhauer, T. (author)
Henschel, W. (author)
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Wahlbrink, T. (author)
Baus, M. (author)
Winkler, O. (author)
Granzner, R. (author)
Schwierz, F. (author)
Spangenberg, B. (author)
Kurz, H. (author)
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 (creator_code:org_t)
Elsevier BV, 2004
2004
English.
In: Solid-State Electronics. - : Elsevier BV. - 0038-1101 .- 1879-2405. ; 48:4, s. 529-534
  • Journal article (peer-reviewed)
Abstract Subject headings
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  • The fabrication of n-type multi-wire MOSFETs on SOI material with triple-gate structures is presented. The output and transfer characteristics of devices with a gate length of 70 nm and a MESA width of 22 nm demonstrate clearly the suppression of short channel effects (SCE). In addition, these triple-gate structures are compared with planar SOI devices of comparable dimensions. The influence of biasing the substrate (back gate) is analyzed and compared to simulation data.

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Nanoteknik (hsv//swe)
ENGINEERING AND TECHNOLOGY  -- Nano-technology (hsv//eng)

Keyword

triple-gate
FinFET
multi-gate
SOI
back gate bias

Publication and Content Type

ref (subject category)
art (subject category)

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