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Single InAs/GaSb Nanowire Low-Power CMOS Inverter

Dey, Anil (author)
Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH
Svensson, Johannes (author)
Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH
Borg, Mattias (author)
Lund University,Lunds universitet,Fasta tillståndets fysik,Fysiska institutionen,Institutioner vid LTH,Lunds Tekniska Högskola,Solid State Physics,Department of Physics,Departments at LTH,Faculty of Engineering, LTH
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Ek, Martin (author)
Lund University,Lunds universitet,Centrum för analys och syntes,Kemiska institutionen,Institutioner vid LTH,Lunds Tekniska Högskola,Centre for Analysis and Synthesis,Department of Chemistry,Departments at LTH,Faculty of Engineering, LTH
Wernersson, Lars-Erik (author)
Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Fasta tillståndets fysik,Fysiska institutionen,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH,Solid State Physics,Department of Physics,Faculty of Engineering, LTH
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 (creator_code:org_t)
2012-10-08
2012
English.
In: Nano Letters. - : American Chemical Society (ACS). - 1530-6992 .- 1530-6984.
  • Journal article (peer-reviewed)
Abstract Subject headings
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  • III − V semiconductors have so far predom- inately been employed for n-type transistors in high-frequency applications. This development is based on the advantageous transport properties and the large variety of heterostructure combinations in the family of III − V semiconductors. In contrast, reports on p-type devices with high hole mobility suitable for complementary metal − oxide − semiconductor (CMOS) circuits for low-power operation are scarce. In addition, the di ffi culty to integrate both n- and p-type devices on the same substrate without the use of complex bu ff er layers has hampered the development of III − V based digital logic. Here, inverters fabricated from single n-InAs/p-GaSb hetero- structure nanowires are demonstrated in a simple processing scheme. Using undoped segments and aggressively scaled high- κ dielectric, enhancement mode operation suitable for digital logic is obtained for both types of transistors. State-of-the-art on- and o ff -state characteristics are obtained and the individual long-channel n- and p-type transistors exhibit minimum subthreshold swings of SS = 98 mV/dec and SS = 400 mV/dec, respectively, at V ds = 0.5 V. Inverter characteristics display a full signal swing and maximum gain of 10.5 with a small device-to-device variability. Complete inversion is measured at low frequencies although large parasitic capacitances deform the waveform at higher frequencies.

Subject headings

TEKNIK OCH TEKNOLOGIER  -- Nanoteknik -- Nanoteknik (hsv//swe)
ENGINEERING AND TECHNOLOGY  -- Nano-technology -- Nano-technology (hsv//eng)

Keyword

Nanowire
inverter
InAs/GaSb
low-power operation
III-V CMOS

Publication and Content Type

art (subject category)
ref (subject category)

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Dey, Anil
Svensson, Johann ...
Borg, Mattias
Ek, Martin
Wernersson, Lars ...
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ENGINEERING AND TECHNOLOGY
ENGINEERING AND ...
and Nano technology
and Nano technology
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Nano Letters
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Lund University

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