Sökning: WFRF:(Öwall Viktor) > Improved memory arc...
Fältnamn | Indikatorer | Metadata |
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000 | 03118naa a2200361 4500 | |
001 | oai:lup.lub.lu.se:5da425e2-4af3-4676-ab66-34c33f951109 | |
003 | SwePub | |
008 | 160404s2011 | |||||||||||000 ||eng| | |
024 | 7 | a https://lup.lub.lu.se/record/19397532 URI |
024 | 7 | a https://doi.org/10.1109/ISVLSI.2011.72 DOI |
040 | a (SwePub)lu | |
041 | a engb eng | |
042 | 9 SwePub | |
072 | 7 | a kon2 swepub-publicationtype |
072 | 7 | a ref2 swepub-contenttype |
100 | 1 | a Dasalukunte, Deepaku Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH4 aut0 (Swepub:lu)esz-dde |
245 | 1 0 | a Improved memory architecture for multicarrier faster-than-Nyquist iterative decoder |
264 | 1 | c 2011 |
300 | a 5 s. | |
520 | a Architectural improvements for a multicarrier faster-than-Nyquist (FTN) decoder are presented in this work. A previously designed FTN decoder has been optimized during implementation, especially with respect to memory considerations to reduce area and power. The memory optimized architecture achieves 28.7% savings in overall chip area and provides 43.8% savings in the estimated power compared to the pre-optimized design. The BER performance tradeoff from one of the memory optimization shows that the degradation is acceptable and can actually provide better performance for certain scenarios. The other memory optimization considers the minimal buffering required within the interference canceller, resulting in memory reduction close to 50% of what was previously reported. The performance from the actual RTL implementation of the FTN decoder is also presented in comparison with the floating and fixed point benchmark performances. | |
650 | 7 | a TEKNIK OCH TEKNOLOGIERx Elektroteknik och elektronik0 (SwePub)2022 hsv//swe |
650 | 7 | a ENGINEERING AND TECHNOLOGYx Electrical Engineering, Electronic Engineering, Information Engineering0 (SwePub)2022 hsv//eng |
653 | a faster-than-Nyquist | |
653 | a hardware implementation | |
653 | a optimization | |
653 | a iterative decoder | |
700 | 1 | a Rusek, Fredriku Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH4 aut0 (Swepub:lu)it-fru |
700 | 1 | a Öwall, Viktoru Lund University,Lunds universitet,Institutionen för elektro- och informationsteknik,Institutioner vid LTH,Lunds Tekniska Högskola,Department of Electrical and Information Technology,Departments at LTH,Faculty of Engineering, LTH4 aut0 (Swepub:lu)tde-vow |
710 | 2 | a Institutionen för elektro- och informationsteknikb Institutioner vid LTH4 org |
773 | 0 | t [Host publication title missing]g , s. 296-300q <296-300 |
856 | 4 | u http://dx.doi.org/10.1109/ISVLSI.2011.7y FULLTEXT |
856 | 4 8 | u https://lup.lub.lu.se/record/1939753 |
856 | 4 8 | u https://doi.org/10.1109/ISVLSI.2011.7 |
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